A decision feedback equalization (e.g., DFE in abbreviation) may remove an intersymbol interference (e.g., ISI in abbreviation), which may result from loss mechanisms in copper traces on printed circuit boards. The loss mechanism may include a skin effect (e.g., a tendency of an alternating electric current (AC) to distribute itself within a conductor so that a density of the AC near a surface of the conductor may be greater than the AC of a core of the conductor), a dielectric loss, reflections from impedance discontinuities.
The DFE may use clean decisions of previously received symbols to remove the ISI in a current symbol. In a process of the DFE, previous data decisions may be fed back, scaled with an adaptive weight, and subtracted from an incoming data (e.g., a received data). A data latch may be driven by a sampling clock and make a data decision based on its input obtained by subtracting a decision feedback voltage from the incoming data. A current decision may be used again to generate another decision feedback voltage for next decision. A generation of the decision feedback voltage may need some settling time (e.g., to convert a digital signal to an analog signal), and/or the summing stage may have its own delay.
For a reliable operation of the DFE, a bandwidth of the data latch and/or the summing stage may need to be high (e.g., a time to complete a process may need to be less than 1 unit interval) to guarantee an overall small settling time, thus consuming a large amount of power. In addition, the time to complete the process may cause a constraint to realize a maximal operation speed which may be allowed for the DFE. Furthermore, an additional silicon area may be needed to construct a circuit (e.g., which may be complex) to generate the decision feedback voltage, convert the decision feedback voltage from digital to analog, and subtract the decision feedback voltage from the incoming data.